Born | 1959 |
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Born | 1959 |
Subjects
Design and construction, Field programmable gate arrays, VHDL (Computer hardware description language), Engineering Prototypes, Computer input-output equipment, Verilog (Computer hardware description language), Vhdl (computer hardware description language), Data processing, Digital electronics, Systems on a chip, TECHNOLOGY & ENGINEERING / Electronics / Circuits / General, 621.39/5, Computers & internet, Digital electronics--data processing, Embedded computer systems, Engineering models, Field programmable gate arrays--design and construction, Prototypes, engineering, Registers (computers), Réseaux logiques programmables par l'utilisateur, Systèmes enfouis (Informatique), Tk7895.g36 c485 2008, Verilog (Langage de description de matériel informatique), Verilog (computer hardware description language)ID Numbers
- OLID: OL1436111A
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September 7, 2008 | Edited by RenameBot | fix author name |
April 1, 2008 | Created by an anonymous user | initial import |