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"Tackle the challenges facing the most advanced technology nodes in the microelectronics industry with the help of design technology co-optimization (DTCO). This mediation process aims to ensure competitive technology architecture definition while avoiding schedule or yield risks caused by unrealistically aggressive process assumptions. Find the answers in this Tutorial Text, which reviews the fundamental design objectives as well as the resulting topological constraints of a standard cell logic design flow; cell design, placement, and routing are examined against the backdrop of ever-increasing design constraints in advanced technology nodes"--
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Design technology co-optimization in the era of sub-resolution IC scaling
2016, SPIE
in English
1628419059 9781628419054
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Includes bibliographical references and index.
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- Created September 21, 2020
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October 28, 2022 | Edited by ImportBot | import existing book |
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September 21, 2020 | Created by MARC Bot | Imported from Library of Congress MARC record |