| Record ID | ia:digitaldesignwit0000duec |
| Source | Internet Archive |
| Download MARC XML | https://archive.org/download/digitaldesignwit0000duec/digitaldesignwit0000duec_marc.xml |
| Download MARC binary | https://www.archive.org/download/digitaldesignwit0000duec/digitaldesignwit0000duec_meta.mrc |
LEADER: 00860cam a22002654a 4500
001 2004045514
003 DLC
005 20041101175647.0
008 040227s2005 nyua 001 0 eng
010 $a 2004045514
020 $a1401840302 (alk. paper)
040 $aDLC$cDLC$dDLC
042 $apcc
050 00 $aTK7872.L64$bD84 2005
082 00 $a621.39/5$222
100 1 $aDueck, Robert K.
245 10 $aDigital design with CPLD applications and VHDL /$cRobert K. Dueck.
250 $a2nd ed.
260 $aClifton Park, NY :$bThomson/Delmar Learning,$cc2005.
300 $axx, 1004 p. :$bill. (some col.) ;$c29 cm. +$e1 CD-ROM (4 3/4 in.)
500 $aIncludes index.
650 0 $aProgrammable logic devices$xDesign and construction.
650 0 $aProgrammable array logic.
650 0 $aLogic design.
650 0 $aVHDL (Computer hardware description language)