| Record ID | marc_columbia/Columbia-extract-20221130-001.mrc:431121991:1506 |
| Source | marc_columbia |
| Download Link | /show-records/marc_columbia/Columbia-extract-20221130-001.mrc:431121991:1506?format=raw |
LEADER: 01506cam a2200385 a 4500
001 344380
005 20220519003635.0
008 850520t19851985maua b 001 0 eng
010 $a 85000078
020 $a0262111039
035 $a(OCoLC)11650165
035 $a(OCoLC)ocm11650165
035 $a(CStRLIN)NYCG85-B47685
035 $9ABN0799CU
035 $a(NNC)344380
035 $a344380
040 $dCStRLIN
050 00 $aQA76.9.A73$bK37 1985
082 0 $a621.3819/5835$219
090 $aQA76.9.A73$bK37 1985
100 1 $aKatevenis, Manolis G. H.$0http://id.loc.gov/authorities/names/n84225138
245 10 $aReduced instruction set computer architectures for VLSI /$cManolis G.H. Katevenis.
260 $aCambridge, Mass. :$bMIT Press,$c[1985], ©1985.
300 $a215 pages :$billustrations ;$c24 cm.
336 $atext$2rdacontent
337 $aunmediated$2rdamedia
338 $avolume$2rdacarrier
490 1 $aACM doctoral dissertation awards ;$v1984
500 $aOriginally presented as author's thesis (Ph. D.)--University of California, Berkeley, 1983.
504 $aBibliography: p. [201]-207.
500 $aIncludes index.
650 0 $aComputer architecture.$0http://id.loc.gov/authorities/subjects/sh85029479
650 0 $aIntegrated circuits$xVery large scale integration.$0http://id.loc.gov/authorities/subjects/sh85067125
830 0 $aACM doctoral dissertation award ;$v1984.$0http://id.loc.gov/authorities/names/n83702037
852 00 $boff,eng$hQA76.9.A73$iK37 1985