It looks like you're offline.
Open Library logo
additional options menu

MARC Record from marc_columbia

Record ID marc_columbia/Columbia-extract-20221130-007.mrc:216065237:4351
Source marc_columbia
Download Link /show-records/marc_columbia/Columbia-extract-20221130-007.mrc:216065237:4351?format=raw

LEADER: 04351mam a2200361 a 4500
001 3186370
005 20221020003905.0
008 010924t20012001caua b 101 0 eng d
010 $a 2001093842
020 $a0769513573
020 $a076951359X
035 $a(OCoLC)ocm48016899
035 $9AUD0947CU
035 $a3186370
040 $aLHL$cLHL$dOrLoB-B
090 $aTK5105.5$b.H67 2001
245 00 $aHot Interconnects 9 :$b22-24 August, 2001, Stanford University, Stanford, CA, USA /$csponsored by the IEEE Computer Society Technical Committee on Microprocessors and Microcomputers, Nortel Networks.
260 $aLos Alamitos, California :$bIEEE Computer Society,$c[2001], ©2001.
300 $axii, 165 pages :$billustrations ;$c28 cm
336 $atext$btxt$2rdacontent
337 $aunmediated$bn$2rdamedia
500 $a"http://www.hoti.org/"--T.p.
504 $aIncludes bibliographic references and author index.
505 00 $tAn Efficient Randomized Algorithm for Input-Queued Switch Scheduling /$rD. Shah, P. Giaccone and B. Prabhakar --$tAn Implementable Parallel Scheduler for Input-Queued Switches /$rP. Giaccone, D. Shah and B. Prabhakar --$tOC-3072 Packet Classification Using BDDs and Pipelined SRAMs /$rA. Prakash and A. Aziz --$tSynfinity II - A High-Speed Interconnect with 2GBytes/sec Self-Configurable Physical Link /$rY. Koyanagi, T. Horie and T. Miyoshi /$r[et al.] --$tOptical-Interconnection as an IP Macro of a CMOS Library /$rT. Yoshikawa, I. Hatakeyama and K. Miyoshi /$r[et al.] --$tThe Sun Fireplane SMP Interconnect in the Sun Fire 3800-6800 /$rA. Charlesworth --$tTCP Switching: Exposing Circuits to IP /$rP. Molinero-Fernandez and N. McKeown --$tFlexible Network Attached Storage Using Remote DMA /$rJ. S. Hansen --$tStonehenge: A Fault-Tolerant Real-Time Network-Attached Storage Device /$rT. Chiueh --
505 80 $tHigh-Speed, High-Bandwidth DRAM Memory Bus with Crosstalk Transfer Logic (XTL) Interface /$rH. Osaka, T. Komatsu and S. Hatano /$r[et al.] --$tReducing Routing Table Size Using Ternary-CAM /$rH. Liu --$tThe Future of MPLS /$rBruce Davie, Yakov Rekhter and Thomas Telkamp /$r[et al.] --$tIPv6 /$rTony Hain, Shigeya Suzuki and Keith Moore --$tDeferred Segmentation for Wire-Speed Transmission of Large TCP Frames over Standard GbE Networks /$rH. Bilic, Y. Birk and I. Chirashnya /$r[et al.] --$tEvaluation of SCSI over TCP/IP and SCSI over Fibre Channel Connections /$rH. Simitci, C. Malakapalli and V. Gunturu --$tLayered Protocol Wrappers for Internet Packet Processing in Reconfigurable Hardware /$rF. Braun, J. Lockwood and M. Waldvogel --$tQuality of Service Guarantee on 802.11 Networks /$rS. Sharma, K. Gopalan and N. Zhu /$r[et al.] --$tAnalysis of a Statistics Counter Architecture /$rD. Shah, S. Iyer and B. Prabhakar /$r[et al.] --
505 80 $tThe Alpha 21364 Network Architecture /$rS. S. Mukherjee, P. Bannon and S. Lang /$r[et al.] --$tRHiNET-3/SW: An 80-Gbit/s High-Speed Network Switch for Distributed Parallel Computing /$rS. Nishimura, T. Kudoh and H. Nishi /$r[et al.] --$tThe Quadrics Network (QsNet): High-Performance Clustering Technology /$rF. Petrini, W. Feng and A. Hoisie /$r[et al.] --$tAnalysis and Avoidance of Cross-Talk in On-Chip Buses /$rC. Duan, A. Tirumala and S. P. Khatri --$tOn the Techniques of Clock Extraction and Oversampling /$rH. Braunisch and R. Nair --$tA Family of ASIC Devices for Next Generation Distributed Packet Switches with QoS Support for IP and ATM /$rF. M. Chiussi, A. Brizio and A. Francini /$r[et al.] --$tNew World Campus Networking /$rN. Figueira, P. Bottorff and H. Li --$tMPLS for Traffic Engineering /$rB. Davie --$tInfiniBand Architecture /$rD. K. Panda --$tBluetooth vs. 802.11 /$rP. Bhagwat --$tControl and Management of Modern Optical Networks /$rD. Saha and S. Sengupta.
650 0 $aInterconnect technology$vCongresses.
650 0 $aOptical communications$vCongresses.$0http://id.loc.gov/authorities/subjects/sh2008108664
650 0 $aNetwork switches$vCongresses.
710 2 $aIEEE Computer Society.$bTechnical Committee on Microprocessors and Microcomputers.$0http://id.loc.gov/authorities/names/n85374903
710 2 $aNortel Networks.$0http://id.loc.gov/authorities/names/no00086158
711 2 $aConference on Hot Interconnects$n(9th :$d2001 :$cStanford, Calif.)
852 00 $boff,eng$hTK5105.5$i.H67 2001g