| Record ID | marc_columbia/Columbia-extract-20221130-031.mrc:125908245:4406 |
| Source | marc_columbia |
| Download Link | /show-records/marc_columbia/Columbia-extract-20221130-031.mrc:125908245:4406?format=raw |
LEADER: 04406cam a2200745Ma 4500
001 15093015
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006 m o d
007 cr |||||||||||
008 130918s2010 fluad ob 001 0 eng d
035 $a(OCoLC)ocn859052405
035 $a(NNC)15093015
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020 $a9781439811276$q(electronic bk.)
020 $a143981127X$q(electronic bk.)
020 $z9781439811245
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035 $a(OCoLC)859052405$z(OCoLC)899156024$z(OCoLC)903972005$z(OCoLC)992071160$z(OCoLC)995040514$z(OCoLC)1063899334$z(OCoLC)1086444732$z(OCoLC)1110601294
037 $aTANDF_205218$bIngram Content Group
050 4 $aTK7868.D5$bC3937 2010
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049 $aZCUA
100 1 $aCavanagh, Joseph.
245 10 $aComputer arithmetic and Verilog HDL fundamentals /$cJoseph Cavanagh.
260 $aBoca Raton, Fla. :$bCRC Press,$c©2010.
264 4 $c©2010
300 $a1 online resource (xx, 951 pages) :$billustrations (some color)
336 $atext$btxt$2rdacontent
337 $acomputer$bc$2rdamedia
338 $aonline resource$bcr$2rdacarrier
504 $aIncludes bibliographical references and index.
505 0 $aCh. 1. Number systems and number representations -- ch. 2. Logic design fundamentals -- ch. 3. Introduction to Verilog HDL -- ch. 4. Fixed-point addition -- ch. 5. Fixed-point subtraction -- ch. 6. Fixed-point multiplication -- ch. 7. Fixed-point division -- ch. 8. Decimal addition -- ch. 9. Decimal subtraction -- ch. 10. Decimal multiplication -- ch. 11. Decimal division -- ch. 12. Floating-point addition -- ch. 13. Floating-point subtraction -- ch. 14. Floating-point multiplication -- ch. 15. Floating-point division -- ch. 16. Additional floating-point topics -- ch. 17. Additional topics in computer arithmetic.
520 $aVerilog Hardware Description Language (HDL) is the state-of-the-art method for designing digital and computer systems. Ideally suited to describe both combinational and clocked sequential arithmetic circuits, Verilog facilitates a clear relationship between the language syntax and the physical hardware. It provides a very easy-to-learn and practical means to model a digital system at many levels of abstraction. Computer Arithmetic and Verilog HDL Fundamentals details the steps needed to master computer arithmetic for fixed-point, decimal, and floating-point number representations for all prima.
650 0 $aDigital electronics.
650 0 $aComputer arithmetic.
650 0 $aVerilog (Computer hardware description language)
650 6 $aÉlectronique numérique.
650 6 $aArithmétique interne des ordinateurs.
650 6 $aVerilog (Langage de description de matériel informatique)
650 7 $aCOMPUTERS$xComputer Literacy.$2bisacsh
650 7 $aCOMPUTERS$xComputer Science.$2bisacsh
650 7 $aCOMPUTERS$xData Processing.$2bisacsh
650 7 $aCOMPUTERS$xHardware$xGeneral.$2bisacsh
650 7 $aCOMPUTERS$xInformation Technology.$2bisacsh
650 7 $aCOMPUTERS$xMachine Theory.$2bisacsh
650 7 $aCOMPUTERS$xReference.$2bisacsh
650 7 $aComputer arithmetic.$2fast$0(OCoLC)fst00872029
650 7 $aDigital electronics.$2fast$0(OCoLC)fst00893670
650 7 $aVerilog (Computer hardware description language)$2fast$0(OCoLC)fst01165388
655 0 $aElectronic books.
655 4 $aElectronic books.
776 08 $iPrint version:$aCavanagh, Joseph J.F.$tComputer arithmetic and Verilog HDL fundamentals.$dBoca Raton, FL : CRC Press, ©2010$z9781439811245$w(DLC) 2009029354$w(OCoLC)317450403
856 40 $uhttp://www.columbia.edu/cgi-bin/cul/resolve?clio15093015$zTaylor & Francis eBooks
852 8 $blweb$hEBOOKS