| Record ID | marc_loc_2016/BooksAll.2016.part26.utf8:51817760:1069 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_2016/BooksAll.2016.part26.utf8:51817760:1069?format=raw |
LEADER: 01069pam a2200253 a 4500
001 97020707
003 DLC
005 19971010124210.8
008 970515s1997 maua b 000 0 eng
010 $a 97020707
020 $a0792399676 (acid-free paper)
040 $aDLC$cDLC$dDLC
050 00 $aTK7874$b.H52435 1997
082 00 $a621.39/2$221
245 00 $aHigh performance clock distribution networks /$cedited by Eby G. Friedman.
260 $aBoston :$bKluwer Academic Publishers,$cc1997.
300 $a164 p. :$bill. ;$c27 cm.
500 $a"Reprinted from a Special issue of Journal of VLSI signal processing systems for signal, image, and video technology, vol. 16, nos. 2 & 3, June/July 1997."
504 $aIncludes bibliographical references.
650 0 $aIntegrated circuits$xVery large scale integration$xDesign and construction.
650 0 $aTiming circuits$xDesign and construction.
650 0 $aSynchronization.
700 1 $aFriedman, Eby G.
730 0 $aJournal of VLSI signal processing systems for signal, image, and video technology.$pSpecial issue.