| Record ID | marc_loc_2016/BooksAll.2016.part28.utf8:207643721:1175 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_2016/BooksAll.2016.part28.utf8:207643721:1175?format=raw |
LEADER: 01175cam a22002894a 4500
001 2001029777
003 DLC
005 20080311085829.0
008 010423s2001 maua b 001 0 eng
010 $a 2001029777
020 $a079237407X (alk. paper)
040 $aDLC$cDLC$dDLC
042 $apcc
050 00 $aTK7874.75$b.K48 2001
082 00 $a621.39/5$221
100 1 $aKhatri, Sunil P.,$d1965-
245 10 $aCross-talk noise immune VLSI design using regular layout fabrics /$cSunil P. Khatri, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli.
260 $aBoston :$bKluwer Academic,$cc2001.
300 $axix, 112 p. :$bill. ;$c24 cm.
504 $aIncludes bibliographical references (p. [103]-106) and index.
650 0 $aIntegrated circuits$xVery large scale integration$xDesign and construction.
650 0 $aCrosstalk$xPrevention.
650 0 $aIntegrated circuit layout.
700 1 $aBrayton, Robert King.
700 1 $aSangiovanni-Vincentelli, Alberto.
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/enhancements/fy0820/2001029777-d.html
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/enhancements/fy0820/2001029777-t.html