| Record ID | marc_loc_2016/BooksAll.2016.part35.utf8:109670130:1411 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_2016/BooksAll.2016.part35.utf8:109670130:1411?format=raw |
LEADER: 01411cam a2200313 a 4500
001 2008014090
003 DLC
005 20081219084156.0
008 080326s2008 enka b 001 0 eng
010 $a 2008014090
015 $aGBA870858$2bnb
016 7 $a014626926$2Uk
020 $a9780521873345 (hard back)
020 $a0521873347 (hard back)
035 $a(OCoLC)214323038
040 $aDLC$cDLC$dBAKER$dBTCTA$dUKM$dYDXCP$dBWKUK$dBWK$dOCLCG$dBWX$dIXA$dCDX$dDLC
050 00 $aTK7874.6$b.H68 2008
082 00 $a621.39/5$222
100 1 $aHossain, Razak,$d1965-
245 10 $aHigh performance ASIC design :$busing synthesizable domino logic in an ASIC flow /$cRazak Hossain.
260 $aCambridge, UK ;$aNew York :$bCambridge University Press,$c2008.
300 $ax, 145 p. :$bill. ;$c26 cm.
504 $aIncludes bibliographical references and index.
650 0 $aApplication-specific integrated circuits$xDesign and construction$xComputer-aided design.
650 0 $aLogic circuits$xComputer-aided design.
650 0 $aVery high speed integrated circuits$xComputer-aided design.
856 42 $3Contributor biographical information$uhttp://www.loc.gov/catdir/enhancements/fy0827/2008014090-b.html
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/enhancements/fy0827/2008014090-d.html
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/enhancements/fy0827/2008014090-t.html