MARC Record from Library of Congress

LEADER: 01711cam a22003497a 4500
001 2010920238
003 DLC
005 20120426081855.0
008 100107s2010 nyua b 001 0 eng
010 $a 2010920238
015 $aGBB003852$2bnb
016 7 $a015461672$2Uk
020 $a9781441909435 (hbk.)
020 $a1441909435 (hbk.)
020 $a1441909443 (ebk.)
020 $a9781441909442 (ebk.)
035 $a(OCoLC)ocn499067154
040 $aUKM$cUKM$dYDXCP$dC#P$dBWX$dCDX$dBTCTA$dLHU$dDLC
042 $aukblcatcopy$alccopycat
082 04 $a621.3815$222
050 00 $aTK7867$b.G85 2010
100 1 $aGulati, Kanupriya.
245 10 $aHardware acceleration of EDA algorithms :$bcustom ICs, FPGAs and GPUs /$cKanupriya Gulati, Sunil P. Khatri.
260 $aNew York :$bSpringer,$cc2010.
300 $axxii, 192 p. :$bill. ;$c24 cm.
504 $aIncludes bibliographical references and index.
505 0 $aHardware Platforms -- GPU Architecture and the CUDA Programming Model -- Accelerating Boolean Satisfiability on a Custom IC -- Accelerating Boolean Satisfiability on an FPGA -- Accelerating Boolean Satisfiability on a Graphics Processing Unit -- Accelerating Statistical Static Timing Analysis Using Graphics Processors -- Accelerating Fault Simulation Using Graphics Processors -- Fault Table Generation Using Graphics Processors -- Accelerating Circuit Simulation Using Graphics Processors -- Automated Approach for Graphics Processor Based Software Acceleration
650 0 $aElectronic circuit design$xData processing.
650 0 $aElectronic circuit design$xAutomation.
650 0 $aComputer algorithms.
650 0 $aComputer-aided design.
700 1 $aKhatri, Sunil P.,$d1965-