MARC Record from Library of Congress

LEADER: 01766cam a2200289 a 4500
001 2011048946
003 DLC
005 20130116083039.0
008 111125s2012 njua b 001 0 eng
010 $a 2011048946
020 $a9781118011034 (hardback)
040 $aDLC$cDLC$dDLC
042 $apcc
050 00 $aTK7895.E42$bC48 2012
082 00 $a006.2/2$223
084 $aTEC008010$2bisacsh
100 1 $aChu, Pong P.,$d1959-
245 10 $aEmbedded SoPC design with NIOS II processor and Verilog examples /$cPong P. Chu.
260 $aHoboken, N.J. :$bWiley,$cc2012.
300 $axxxiii, 747 p. :$bill. ;$c26 cm.
504 $aIncludes bibliographical references (P. 741-743) and index.
520 $a"This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"--$cProvided by publisher.
520 $a"The book utilizes FPGA devices, Nios II soft-core processor, and development platform from Altera Co., which is one of the two main FPGA manufactures"--$cProvided by publisher.
650 0 $aEmbedded computer systems.
650 0 $aField programmable gate arrays.
650 0 $aVerilog (Computer hardware description language)
650 7 $aTECHNOLOGY & ENGINEERING / Electronics / Circuits / General.$2bisacsh