Record ID | marc_loc_updates/v36.i05.records.utf8:41137257:1045 |
Source | Library of Congress |
Download Link | /show-records/marc_loc_updates/v36.i05.records.utf8:41137257:1045?format=raw |
LEADER: 01045nam a22002654a 4500
001 2008270753
003 DLC
005 20080129064734.0
008 080111s2008 njua b 001 0 eng
010 $a 2008270753
020 $a9780470229415
040 $aDLC$cDLC
050 00 $aTK7871.99.M44$bB35 2008
100 1 $aBaker, R. Jacob,$d1964-
245 10 $aCMOS circuit design, layout, and simulation /$cR. Jacob Baker.
250 $aRev. 2nd ed.
260 $aPiscataway, NJ :$bIEEE Press ;$aHoboken, NJ :$bWiley-Interscience,$cc2008.
300 $axxxi, 1038 p. :$bill. ;$c25 cm.
490 0 $aIEEE Press series on microelectronic systems
500 $a"Stuart K. Tewksbury and Joe E. Brewer, series editors"--Cover.
504 $aIncludes bibliographical references and index.
650 0 $aMetal oxide semiconductors, Complementary$xDesign and construction.
650 0 $aIntegrated circuits$xDesign and construction.
650 0 $aMetal oxide semiconductor field-effect transistors.
710 2 $aInstitute of Electrical and Electronics Engineers.