| Record ID | marc_loc_updates/v36.i10.records.utf8:5094389:1210 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_updates/v36.i10.records.utf8:5094389:1210?format=raw |
LEADER: 01210cam a2200289 a 4500
001 93010962
003 DLC
005 20080310123327.0
008 930415s1993 maua b 000 0 eng
010 $a 93010962
020 $a0792393678 (acid-free paper)
040 $aDLC$cDLC$dDLC
050 00 $aQA76.58$b.I49 1993
082 00 $a004/.35$220
245 00 $aInstruction-level parallelism :$ba special issue of The journal of supercomputing /$cedited by B.R. Rau and J.A. Fisher.
260 $aBoston :$bKluwer Academic Publishers,$cc1993.
300 $a282 p. :$bill. ;$c25 cm.
440 4 $aThe Kluwer international series in engineering and computer science ;$vSECS 235
500 $a"Reprinted from The journal of supercomputing, volume 7, number 1/2, 1993."
504 $aIncludes bibliographical references.
650 0 $aParallel processing (Electronic computers)
650 0 $aSupercomputers.
700 1 $aRau, Bantwal Ramakrishna.
700 1 $aFisher, Joseph A.
730 0 $aJournal of supercomputing.
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/enhancements/fy0820/93010962-d.html
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/enhancements/fy0820/93010962-t.html