| Record ID | marc_loc_updates/v36.i42.records.utf8:18361354:831 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_updates/v36.i42.records.utf8:18361354:831?format=raw |
LEADER: 00831cam a22002658a 4500
001 2008026558
003 DLC
005 20081020104648.0
008 080616s2009 flu b 001 0 eng
010 $a 2008026558
020 $a9781420044713 (hardback : alk. paper)
040 $aDLC$cDLC$dDLC
050 00 $aTK5105.546$b.D47 2009
082 00 $a004.1$222
245 00 $aDesign of cost-efficient interconnect processing units :$bSpidergon STNoC /$cMarcello Coppola.
260 $aBoca Raton :$bTaylor & Francis,$c2009.
263 $a0809
300 $ap. cm.
490 0 $aSystem-on-chip design and technologies ;$v2
500 $a"A CRC title."
504 $aIncludes bibliographical references and index.
650 0 $aNetworks on a chip.
610 20 $aST Microelectronics.
650 0 $aMicroprocessors.
700 1 $aCoppola, Marcello.