| Record ID | marc_nuls/NULS_PHC_180925.mrc:151434131:1689 |
| Source | marc_nuls |
| Download Link | /show-records/marc_nuls/NULS_PHC_180925.mrc:151434131:1689?format=raw |
LEADER: 01689cam 2200373 a 4500
001 9920640480001661
005 20150423130933.0
008 071025s2008 ne a b 001 0 eng
020 $a9781402067891 (hbk.)
020 $a1402067895 (hbk.)
020 $a1402067909 (ebook)
020 $a9781402067907 (ebook)
035 $a(CSdNU)u324155-01national_inst
035 $a(OCoLC)180474070
035 $a(OCoLC)180474070
035 $a(OCoLC)180474070
040 $aUKM$cUKM$dYDXCP$dBTCTA$dBAKER$dCUS$dOrLoB-B
042 $aukblcatcopy
049 $aCNUM
082 04 $a621.3815$222
090 $aTK5103.78$bS47 2008
100 1 $aSerneels, Bert,$d1978-
245 10 $aDesign of high voltage xDSL line drivers in standard CMOS /$cby Bert Serneels and Michiel Steyaert.
260 $aDordrecht :$bSpringer,$cc2008.
300 $axiii, 185 p. :$bill. ;$c25 cm.
490 1 $aAnalog circuits and signal processing
504 $aIncludes bibliographical references and index.
505 0 $a1. Introduction -- 2. Digital Subscriber Line: Signals, Specifications and Driver Solutions -- 3. The SOPA xDSL Line Driver -- 4. High Voltage Design Considerations -- 5. High Voltage Implementations in Standard CMOS -- 6. High Voltage Line Driver Realisations -- 7. Conclusions.
650 0 $aLine drivers (Integrated circuits)$xDesign and construction.
650 0 $aMetal oxide semiconductors, Complementary.
700 1 $aSteyaert, Michiel,$d1959-
830 0 $aKluwer international series in engineering and computer science. $pAnalog circuits and signal processing.
994 $aC0$bCNU
999 $aTK 5103.78 .S47 2008$wLC$c1$i31786102401004$lCIRCSTACKS$mNULS$rY$sY $tBOOK$u4/22/2008