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MARC Record from marc_nuls

Record ID marc_nuls/NULS_PHC_180925.mrc:164515692:3103
Source marc_nuls
Download Link /show-records/marc_nuls/NULS_PHC_180925.mrc:164515692:3103?format=raw

LEADER: 03103cam 2200541 a 4500
001 9920754360001661
005 20150423131508.0
008 071116s2008 njua b 001 0 eng c
010 $a 2008270753
015 $aGBA795722$2bnb
016 7 $a014408245$2Uk
019 $a166367833
020 $a9780470229415 (hbk.)
020 $a0470229411 (hbk.)
029 1 $aIG#$b9780470229415
029 1 $aNZ1$b11643376
035 $a(CSdNU)u334963-01national_inst
035 $a(OCoLC)181928338
035 $a(OCoLC)181928338
035 $a(OCoLC)181928338$z(OCoLC)166367833
040 $aUKM$cUKM$dFDA$dWAU$dDLC$dIG#$dBAKER$dBTCTA$dYDXCP$dVRC$dOrLoB-B
042 $apcc
049 $aCNUM
050 00 $aTK7871.99.M44$bB35 2008
082 04 $a621.3815$222
100 1 $aBaker, R. Jacob,$d1964-
245 10 $aCMOS :$bcircuit design, layout, and simulation /$cR. Jacob Baker.
250 $aRev. 2nd ed.
260 $aPiscataway, NJ :$bIEEE Press ;$aHoboken, N.J. :$bWiley-Interscience, $cc2008.
300 $axxxi, 1038 p. :$bill. ;$c25 cm.
440 0 $aIEEE Press series on microelectronic systems
500 $aPrevious ed.: Piscataway, N.J.: IEEE, 2005.
500 $a"IEEE Solid-State Circuits Society, sponsor."
504 $aIncludes bibliographical references and index.
505 0 $aCh. 1. Introduction to CMOS Design -- Ch. 2. The Well -- Ch. 3. The Metal Layers -- Ch. 4. The Active and Poly Layers -- Ch. 5. Resistors, Capacitors, MOSFETs -- Ch. 6. MOSFET Operation -- Ch. 7. CMOS Fabrication / Jeff Jessing -- Ch. 8. Electrical Noise: An Overview -- Ch. 9. Models for Analog Design -- Ch. 10. Models for Digital Design -- Ch. 11. The Inverter -- Ch. 12. Static Logic Gates -- Ch. 13. Clocked Circuits -- Ch. 14. Dynamic Logic Gates -- Ch. 15. VLSI Layout Examples -- Ch. 16. Memory Circuits -- Ch. 17. Sensing Using [Delta][Sigma] Modulation -- Ch. 18. Special Purpose CMOS Circuits -- Ch. 19. Digital Phase-Locked Loops -- Ch. 20. Current Mirrors -- Ch. 21. Amplifiers -- Ch. 22. Differential Amplifiers -- Ch. 23. Voltage References -- Ch. 24. Operational Amplifiers I -- Ch. 25. Dynamic Analog Circuits -- Ch. 26. Operational Amplifiers II -- Ch. 27. Nonlinear Analog Circuits -- Ch. 28. Data Converter Fundamentals -- Ch. 29. Data Converter Architectures.
650 0 $aMetal oxide semiconductors, Complementary$xDesign and construction.
650 0 $aIntegrated circuits$xDesign and construction.
650 0 $aMetal oxide semiconductor field-effect transistors.
710 2 $aInstitute of Electrical and Electronics Engineers.
710 2 $aIEEE Solid-State Circuits Society.
938 $aIngram$bINGR$n9780470229415
938 $aBaker & Taylor$bBKTY$c115.00$d115.00$i0470229411$n0007364924$sactive
938 $aYBP Library Services$bYANK$n2715521
938 $aBaker and Taylor$bBTCP$n2008270753
947 $fSOET-CIS$hCIRCSTACKS$p$98.90$q1
949 $aTK 7871.99.M44 B35 2008$i31786102446918
994 $a92$bCNU
999 $aTK 7871.99 .M44 B35 2008$wLC$c1$i31786102446918$d9/29/2010$e9/29/2010 $lCIRCSTACKS$mNULS$n6$rY$sY$tBOOK$u10/29/2008