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Previews available in: English
Subjects
Formal methods (Computer science), Testing, Verification, Integrated circuits, Systems on a chip, Circuits & components, Electrical engineering, Technology & Engineering, Technology & Industrial Arts, Science/Mathematics, Electricity, Electronics - Circuits - Integrated, Electronics - Microelectronics, Nonfiction, Technology / Engineering / Electrical, Formal methods (Computer science), Integrated circuits, Systems on a chip, Testing, Verification, System designShowing 3 featured editions. View all 3 editions?
Edition | Availability |
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1
Verification Techniques for System-Level Design
2010, Elsevier Science & Technology Books
in English
0080553133 9780080553139
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WorldCat
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2
Verification techniques for system-level design
2008, Morgan Kaufmann Publishers
in English
0123706165 9780123706164
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WorldCat
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3
Verification Techniques for System-Level Design (Systems on Silicon) (Systems on Silicon)
October 23, 2007, Morgan Kaufmann
Hardcover
in English
0123706165 9780123706164
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Book Details
Edition Notes
Includes bibliographical references and index.
Classifications
The Physical Object
ID Numbers
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Feedback?August 1, 2020 | Edited by ImportBot | import existing book |
July 30, 2019 | Edited by MARC Bot | associate edition with work OL12370312W |
January 23, 2010 | Edited by WorkBot | add more information to works |
December 11, 2009 | Created by WorkBot | add works page |