An edition of Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems) (2007)

Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems)

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Cover of: Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems) by Robert B. Reese, Robert B. Reese
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Last edited by ImportBot
February 25, 2022 | History
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An edition of Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems) (2007)

Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems)

by

  • 1 Want to read

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Publish Date
Publisher
Morgan and Claypool Publishers
Language
English
Pages
84

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Previews available in: English

Subjects

Logic design, Computer hardware description languages, Verilog (Computer hardware description language), Computer programs, Electronic digital computers, Design and construction, Verilog (computer hardware description language)
Edition Availability
Cover of: Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems)
Introduction to Logic Synthesis Using Verilog HDL (Synthesis Lectures on Digital Circuits and Systems)
April 25, 2007, Morgan and Claypool Publishers
Paperback in English

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Book Details

The Physical Object

Format
Paperback
Number of pages
84
Dimensions
9 x 7.2 x 0.4 inches
Weight
6.4 ounces

ID Numbers

Open Library
OL12496433M
Internet Archive
introductiontolo00rees
ISBN 10
1598291068
ISBN 13
9781598291063
Library Thing
6363696
Goodreads
3971244

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Better World Books record
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History

Download catalog record: RDF / JSON
February 25, 2022 Edited by ImportBot import existing book
July 29, 2014 Edited by ImportBot import new book
April 28, 2010 Edited by Open Library Bot Linked existing covers to the work.
January 30, 2010 Edited by WorkBot add more information to works
December 9, 2009 Created by WorkBot add works page