An edition of Algorithmic and register-transfer level synthesis
(1989)
Algorithmic and register-transfer level synthesis
the system architect's workbench
by D. E. Thomas, Donald E. Thomas, Elizabeth D. Lagnese, Robert A. Walker, Jayanth V. Rajan, Robert L. Blackburn, and John A. Nestor
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Subjects
Computer architecture, Integrated circuits, Design and construction, Circuits & components, Technology, Electronic Circuit Design, Cad/Cam, Computers - General Information, Science/Mathematics, Logic Design, Electronics - Circuits - General, CAD-CAM - General, Computers / Logic Design, Computers-CAD-CAM - General, Technology / Electronics / Circuits / General, Technology-Electronics - Circuits - General, Computer Bks - General Information, ComputersShowing 2 featured editions. View all 2 editions?
| Edition | Availability |
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1
Algorithmic and register-transfer level synthesis: the system architect's workbench
1990, Kluwer Academic Publishers
in English
0792390539 9780792390534
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WorldCat
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2
Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench (The International Series in Engineering and Computer Science)
October 31, 1989, Springer
Hardcover
in English
- 1 edition
0792390539 9780792390534
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WorldCat
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Book Details
Edition Notes
Includes bibliographical references (p. [281]-296) and index.
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| July 31, 2019 | Edited by MARC Bot | associate edition with work OL19195881W |
| March 11, 2019 | Created by MARC Bot | import existing book |