An edition of Step-by-step functional verification with SystemVerilog and OVM (2008)

Step-by-step functional verification with SystemVerilog and OVM

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Cover of: Step-by-step functional verification with SystemVerilog and OVM by Sasan Iman, Sasan Iman
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Last edited by MARC Bot
July 7, 2019 | History
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An edition of Step-by-step functional verification with SystemVerilog and OVM (2008)

Step-by-step functional verification with SystemVerilog and OVM

by

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Publish Date
Publisher
Hansen Brown Publishing
Language
English
Pages
500

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Previews available in: English

Subjects

Verilog (Computer hardware description language), Integrated circuits, Verification
Edition Availability
Cover of: Step-by-step functional verification with SystemVerilog and OVM
Step-by-step functional verification with SystemVerilog and OVM
2008, Hansen Brown Publishing
in English
  • Not in Library
Libraries near you: WorldCat

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Book Details

Edition Notes

Includes index.

Published in
San Francisco, CA
Other Titles
Step-by-step functional verification with SystemVerilog and Open Verification Methodology

The Physical Object

Pagination
xxii, 500 p.
Number of pages
500

ID Numbers

Open Library
OL27089300M
Internet Archive
stepbystepfuncti00iman
ISBN 10
0981656218
ISBN 13
9780981656212
OCLC/WorldCat
256214698

Source records

Internet Archive item record
ISBNdb

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July 7, 2019 Created by MARC Bot import new book