An edition of Multicore Systems On-Chip (2012)

Multicore Systems on-Chip

Practical Software/Hardware Design

Multicore Systems on-Chip
Abderazek Ben Abdallah, Abdera ...
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Last edited by MARC Bot
September 19, 2024 | History
An edition of Multicore Systems On-Chip (2012)

Multicore Systems on-Chip

Practical Software/Hardware Design

System on chips designs have evolved from fairly simple unicore, single memory designs to complex heterogeneous multicore SoC architectures consisting of a large number of IP blocks on the same silicon. To meet high computational demands posed by latest consumer electronic devices, most current systems are based on such paradigm, which represents a real revolution in many aspects in computing. The attraction of multicore processing for power reduction is compelling. By splitting a set of tasks among multiple processor cores, the operating frequency necessary for each core can be reduced, allowing to reduce the voltage on each core. Because dynamic power is proportional to the frequency and to the square of the voltage, we get a big gain, even though we may have more cores running.

As more and more cores are integrated into these designs to share the ever increasing processing load, the main challenges lie in efficient memory hierarchy, scalable system interconnect, new programming paradigms, and efficient integration methodology for connecting such heterogeneous cores into a single system capable of leveraging their individual flexibility. Current design methods tend toward mixed HW/SW co-designs targeting multicore systems on-chip for specific applications. To decide on the lowest cost mix of cores, designers must iteratively map the device’s functionality to a particular HW/SW partition and target architectures. In addition, to connect the heterogeneous cores, the architecture requires high performance complex communication architectures and efficient communication protocols, such as hierarchical bus, point-to-point connection, or Network-on-Chip.

Software development also becomes far more complex due to the difficulties in breaking a single processing task into multiple parts that can be processed separately and then reassembled later. This reflects the fact that certain processor jobs cannot be easily parallelized to run concurrently on multiple processing cores and that load balancing between processing cores – especially heterogeneous cores – is very difficult.

Publish Date
Language
English

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Edition Availability
Cover of: Multicore Systems on-Chip
Multicore Systems on-Chip: Practical Software/Hardware Design
2015, Atlantis Press (Zeger Karssen)
in English
Cover of: Multicore Systems On-Chip
Multicore Systems On-Chip: Practical Software, Hardware Design
2013, We Publish Books
in English
Cover of: Multicore Systems On-Chip
Multicore Systems On-Chip: Practical Software/Hardware Design
2012, Springer
in English

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Book Details


Classifications

Library of Congress
TK7885-7895

The Physical Object

Pagination
xxvi, 273
Weight
4.569

ID Numbers

Open Library
OL37250148M
ISBN 13
9789462390508

Source records

Better World Books record

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September 19, 2024 Edited by MARC Bot import existing book
October 2, 2021 Created by ImportBot import new book