The application of OFDM technology to radios operating in the 60 GHz band has stimulated much interest in the research community. The implementation of these systems has brought a series of design challenges since a successful design must traverse multiple design representation layers and experience numerous transformations. This thesis focuses on the implementation of an OFDM baseband processing system for 60 GHz radios supporting data rates of up to 1.5 Gbps. It covers the system level, architectural level and implementation level design issues. A framework for OFDM system level design, including the identification of key design parameters, a design tool to rapidly explore the design space, and an SoC-oriented system functional model, has been proposed and implemented. A systematic finite-word-length effect evaluation method based on statistical analysis and bit-true simulation has been adopted to transform the algorithm into an area-efficient fixed-point implementation. Architectures for critical building blocks are carefully explored to meet the required performance specifications with acceptable cost. The whole system has been coded in Verilog, verified, synthesized and implemented in a Xilinx FPGA.