An edition of Layout synthesis of Nmos gate-cells (1983)

Layout synthesis of Nmos gate-cells

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Layout synthesis of Nmos gate-cells
Joseph F. P. Luhukay, Joseph F ...
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Last edited by MARC Bot
November 2, 2020 | History
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An edition of Layout synthesis of Nmos gate-cells (1983)

Layout synthesis of Nmos gate-cells

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Publish Date
Publisher
Dept. of Computer Science, University of Illinois at Urbana-Champaign
Language
English
Pages
127

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Subjects

Data processing, Design and construction, Integrated circuits, Very large scale integration, Integrated circuit layout
Edition Availability
Cover of: Layout synthesis of Nmos gate-cells
Layout synthesis of Nmos gate-cells
1983, Dept. of Computer Science, University of Illinois at Urbana-Champaign
in English

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Book Details

Edition Notes

Bibliography: p. 123-126.
Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1983.
"December 1983."

Published in
Urbana, Ill
Series
Report ;, no. UIUCDCS-R-83-1099, Report (University of Illinois at Urbana-Champaign. Dept. of Computer Science) ;, no. UIUCDCS-R-83-1099.

Classifications

Dewey Decimal Class
001.64 s, 621.3819/5835
Library of Congress
QA76 .I4 no. 1099, TK7874 .I4 no. 1099

The Physical Object

Pagination
127 p. :
Number of pages
127

Edition Identifiers

Open Library
OL3002843M
LCCN
84621969

Work Identifiers

Work ID
OL5463603W

Source records

Library of Congress MARC record

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History

Download catalog record: RDF / JSON
November 2, 2020 Edited by MARC Bot import existing book
December 4, 2010 Edited by Open Library Bot Added subjects from MARC records.
December 10, 2009 Created by WorkBot add works page