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Last edited by RenameBot
September 1, 2008 | History

Sasan Iman

We need a photo of Sasan Iman

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  • Cover of: The e Hardware Verification Language

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  • Cover of: SystemVerilog Functional Verification

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  • Cover of: Logic Synthesis for Low Power VLSI Designs

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  • Cover of: Step-by-step functional verification with SystemVerilog and OVM

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  • Cover of: Logic synthesis for low power VLSI designs

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History

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September 1, 2008 Edited by RenameBot fix author name
April 1, 2008 Created by an anonymous user initial import