| Born | 1956 |
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| Born | 1956 |
Subjects
Integrated circuits, Verification, Computer engineering, Computer-aided design, Computers - General Information, Design and construction, Electronics - General, Engineering, General Theory of Computing, Integrated circuits, very large scale integration, Logic Design, Science/Mathematics, Systems engineering, Technology, Technology / Electronics / Circuits / General, Verilog (Computer hardware des, Verilog (Computer hardware description language), Verilog (computer hardware description language), Very large scale integrationID Numbers
- OLID: OL5649824A
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| October 21, 2008 | Created by ImportBot | Imported from Oregon Libraries MARC record |