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The FireWire (IEEE 1394a) standard for high-speed serial bus communications has come to the fore as an important technology supporting today's emerging data-intensive applications.
FireWire System Architecture provides an in-depth description of the IEEE 1394a cable environment, based on the 2.0 version of the 1394a standard. Comprehensive, concise, and well-organized, this book details the specification itself and presents the architecture, features, and operations of systems developed with the FireWire bus.
Completely up-to-date, this new edition covers all of the changes incorporated into the 2.0 standard, such as arbitration enhancements, improvements in bus reset timing, new PHY register definition, and port interface enhancements to support suspend/resume and port disable. In addition, it provides in-depth information on suspend/resume operation, power distribution, and power management.
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Previews available in: English
Subjects
IEEE 1394 (Standard), Computer architectureEdition | Availability |
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FireWire system architecture: IEEE 1394a
1999, Addison-Wesley
in English
- 2nd ed.
0201485354 9780201485356
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Book Details
Edition Notes
Includes index.
Classifications
The Physical Object
ID Numbers
Source records
Oregon Libraries MARC recordBetter World Books record
Promise Item
marc_columbia MARC record
Work Description
FireWire (IEEE 1394) is an emerging technology that provides high-speed serial bus communications. This book offers an in-depth description of the IEEE 1394 cable environment based on the 1394-1995 release of the standard and includes changes introduced by the 1394a supplement. IEEE 1394 defines a layered software and hardware approach for serial bus communication.
FireWire System Architecture details the various layers and provides transaction examples to explain and illustrate the relationships between each layer. It explores important features of 1394 including: node architecture; address space; arbitration; transaction types: isochronous, asynchronous, lock; broadcast transactions; control and status registers (CSRs); automatic configuration; configuration ROM; bus management; physical layer; transaction layer; link layer; and cable and electrical interface.
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History
- Created October 27, 2008
- 9 revisions
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July 15, 2024 | Edited by MARC Bot | import existing book |
December 5, 2022 | Edited by ImportBot | import existing book |
November 18, 2022 | Edited by ImportBot | import existing book |
August 23, 2020 | Edited by ImportBot | import existing book |
October 27, 2008 | Created by ImportBot | Imported from Oregon Libraries MARC record |