An edition of Low-Power Variation-Tolerant Design in Nanometer Silicon
(2011)
Low-Power Variation-Tolerant Design in Nanometer Silicon
by Swarup Bhunia
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Previews available in: English
Subjects
Systems engineering, Engineering, Computer-aided design, power, design, voltage, variation, circuit, leakage, delay, variations, circuits, ieee, low power, supply voltage, ieee trans, power consumption, international conference, design automation, process variation, international symposium, power dissipation, leakage power, Mathematical models, Low voltage integrated circuits, Integrated circuits, Design and construction| Edition | Availability |
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1
Low-Power Variation-Tolerant Design in Nanometer Silicon
Oct 10, 2014, Springer
paperback
1489981578 9781489981578
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2
Low-Power Variation-Tolerant Design in Nanometer Silicon
Apr 07, 2011, Springer
paperback
1441974199 9781441974198
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3
Low-Power Variation-Tolerant Design in Nanometer Silicon
2011, Springer Science+Business Media, LLC, Springer
electronic resource /
in English
- 1.
1441974172 9781441974174
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- Created May 4, 2020
- 2 revisions
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| May 25, 2022 | Edited by ImportBot | import existing book |
| May 4, 2020 | Created by ImportBot | Imported from amazon.com record |