An edition of Design of cost-efficient interconnect processing units (2008)

Design of Cost-Efficient Interconnect Processing Units

Spidergon STNoC

by , , , , and

Design of Cost-Efficient Interconnect Process ...
Miltos D. Grammatikakis, Marce ...
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Last edited by ImportBot
September 21, 2021 | History
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An edition of Design of cost-efficient interconnect processing units (2008)

Design of Cost-Efficient Interconnect Processing Units

Spidergon STNoC

by , , , , and

This edition doesn't have a description yet. Can you add one?

Publish Date
Publisher
Taylor & Francis Group
Language
English
Pages
288

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Subjects

ST Microelectronics, Networks on a chip, Microprocessors, Microelectronics, Réseaux sur puce, COMPUTERS, Hardware, Mainframes & Minicomputers, Mikroprocessorer

Showing 8 featured editions. View all 8 editions?

Edition Availability
Cover of: Design of Cost-Efficient Interconnect Processing Units
Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC
2020, Taylor & Francis Group
in English
Libraries near you: WorldCat
Cover of: Design of Cost-Efficient Interconnect Processing Units
Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC
2020, Taylor & Francis Group
in English
  • Not in Library
Libraries near you: WorldCat
Cover of: Design of Cost-Efficient Interconnect Processing Units
Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC
2020, Taylor & Francis Group
in English
Libraries near you: WorldCat
Cover of: Design of Cost-Efficient Interconnect Processing Units
Design of Cost-Efficient Interconnect Processing Units: Spidergon STNoC
2018, Taylor & Francis Group
in English
Libraries near you: WorldCat
Cover of: Design of cost-efficient interconnect processing units
Design of cost-efficient interconnect processing units: Spidergon STNoC
2009, Taylor & Francis
in English
Libraries near you: WorldCat
Cover of: Design of cost-efficient interconnect processing units
Design of cost-efficient interconnect processing units: the Spidergon STNoC
2009, Taylor & Francis
in English
Libraries near you: WorldCat
Cover of: Design of Cost-Efficient Interconnect Processing Units
Design of Cost-Efficient Interconnect Processing Units: Spidergon Stnoc
2008, Taylor & Francis Group
in English
Libraries near you: WorldCat
Cover of: Design of Cost-Efficient Network-on-Chip Architectures
Design of Cost-Efficient Network-on-Chip Architectures: The STNoC (System-on-Chip Design and Technologies)
July 15, 2008, CRC
Hardcover in English
Libraries near you: WorldCat

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Book Details

ID Numbers

Open Library
OL33741228M
ISBN 13
9781315219936

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Better World Books record

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September 21, 2021 Created by ImportBot Imported from Better World Books record