An edition of Guide to RISC Processors (2005)

Guide to RISC Processors

for Programmers and Engineers

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Last edited by MARC Bot
August 12, 2024 | History
An edition of Guide to RISC Processors (2005)

Guide to RISC Processors

for Programmers and Engineers

  • 0 Ratings
  • 1 Want to read
  • 0 Currently reading
  • 0 Have read

Recently, there has been a trend toward processor design based on the RISC (Reduced Instruction Set Computer) model: Example RISC processors are the MIPS, SPARC, PowerPC, ARM, and even Intel’s 64-bit processor Itanium. This guidebook provides an accessible and all-encompassing compendium on RISC processors, introducing five RISC processors: MIPS, SPARC, PowerPC, ARM, and Itanium. Initial chapters explain the differences between the CISC and RISC designs and clearly discuss the core RISC design principles. The text then integrates instruction on MIPS assembly language programming, thereby enabling readers to concretely grasp concepts and principles introduced earlier. Readers need only have a basic knowledge of any structured, high-level language to obtain the full benefits here.

Features: Includes MIPS simulator (SPIM) download instructions, so that readers can get hands-on assembly language programming experience Presents material in a manner suitable for flexible self-study • Assembly language programs permit reader executables using the SPIM simulator • Integrates core concepts to processor designs and their implementations • Supplies extensive and complete programming examples and figures • Contains chapter-by-chapter overviews and summaries * Provides source code for the MIPS language at the book’s website Guide to RISC Processors provides a uniquely comprehensive introduction and guide to RISC-related concepts, principles, design philosophy, and actual programming, as well as the all the popular modern RISC processors and their assembly language. Professionals, programmers, and students seeking an authoritative and practical overview of RISC processors and assembly language programming will find the guide an essential resource. Sivarama P.

Dandamudi is a professor of computer science at Carleton University in Ottawa, Ontario, Canada, as well as associate editor responsible for computer architecture at the International Journal of Computers and Their Applications. He has more than two decades of experience teaching about computer systems and organization. Key Topics * Processor design issues * Evolution of CISC and RISC processors * MIPS, SPARC, PowerPC, Itanium, and ARM architectures * MIPS assembly language * SPIM simulator and debugger * Conditional execution * Floating-point and logical and shift operations * Number systems Computer Architecture/Programming Beginning/Intermediate Level

Publish Date
Publisher
Springer
Language
English
Pages
387

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Previews available in: English

Edition Availability
Cover of: Guide to RISC Processors
Guide to RISC Processors: for Programmers and Engineers
February 16, 2005, Springer
in English

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Book Details


First Sentence

"Computers are complex systems."

Classifications

Library of Congress
QA76.5 .D2515 2005, TK7895.M5

ID Numbers

Open Library
OL7444358M
Internet Archive
guidetoriscproce00dand
ISBN 10
0387210172
ISBN 13
9780387210179
LCCN
2004051373
OCLC/WorldCat
56591976
Library Thing
6362939
Goodreads
2063762

First Sentence

"Computers are complex systems."

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August 12, 2024 Edited by MARC Bot import existing book
December 19, 2023 Edited by ImportBot import existing book
February 25, 2022 Edited by ImportBot import existing book
June 30, 2019 Edited by MARC Bot import existing book
December 9, 2009 Created by WorkBot add works page